ADLINK EOS-4000 - Manual (Page 36)

24 Introduction
1.8 General Purpose Digital Signals
1.8.1 General Purpose Digital Output (EDO)
In the common ground connection of isolated digital output, as
shown, when a “1” (logic high) is written by FPGA to a DO chan-
nel, the sink current passes through the transistors and the DO
channel goes low. When a “0” (logic low) is written by FPGA to a
DO channel, no current passes through the transistors and the DO
channel goes high. When the load is of an “inductance nature”
such as a relay, coil or motor, the Clamp COMn must be con-
nected to an external power source. The extra connection is uti-
lized for the ‘fly-wheel diode’ to form a current-release closed loop,
so that the transistors are protected from any high reverse voltage
generated by the inductance load when the output is switched
from high to low.
DC12V~24V
EOS-4000 Clamp COMn
DOn
ISO GND