ADLINK aTCA-9300 - Manual (Page 18)

18
3.1.2 Memory
The aTCA-9300 adopts the Intel® Xeon® processor E3 (or Core™ i3) providing two memory
channels supporting DDR3 800, 1066, 1333, and 1600 MT/s DIMMs. The maximum memory
capacity is 32GB with memory interleaving support. The 400/533/667/800 MHz differential
memory clocks are driven by the Intel® Xeon® processor E3 CPU with length-matching and
impedance controlled through all the DIMM slots.
The DDR3 DIMMs support the I
2 C interface. They are connected together and routed to the
PCH for the management.
Memory configuration changes are only permitted to be performed at the factory.
Failure to comply with the above may result in damage to your board or improper
operation.
3.1.3 Intel® C216 Chipset Overview
The Intel® C216 Chipset provides a connection point between various I/O components and
DMI based processors. Functions and capabilities include:
„
Direct Media Interface Up to 20 Gb/s each direction
„ Up to eight PCI Express root ports Supports PCI Express Rev 2.0 running at up to
5.0 GT/s
„ Integrated Serial ATA Host Controller
—Up to six SATA ports
—Data transfer rates up to 6.0 Gb/s (600 MB/s) on up to two ports
—Data transfer rates up to 3.0 Gb/s (300 MB/s) and up to 1.5 Gb/s (150 MB/s) on all
ports
—Integrated AHCI controller
„ Intel® Rapid Storage Technology
—Configures the PCH SATA controller as a RAID controller supporting RAID 0/1/5
„ Platform Environmental Control Interface (PECI) and Simple Serial Transport (SST)
1.0 Bus (Server and Workstation Only)
„ supporting up to fourteen external USB 2.0 ports
„ Power Management Logic
—Supports ACPI 4.0a
—ACPI-defined power states (processor driven C states)
—ACPI Power Management Timer
—SMI# generation —All registers readable/restorable for proper resume from 0 V
core well suspend states
—Support for APM-based legacy power management for non-ACPI implementations
„ Integrated Clock Controller
—Full featured platform clocking without need for a discrete clock chip
—Ten PCIe 2.0 specification compliant clocks, four 33 MHz PCI clocks, four Flex
Clocks that can be configured for various crystal replacement frequencies, one 120
MHz clock for embedded DisplayPort*
—Two isolated PCIe* 2.0 jitter specification compliant clock domains
„ Enhanced DMA Controller Supports LPC DMA
„ Supports SMBus 2.0 Specification
„ Real-Time Clock
„ Serial Peripheral Interface (SPI)