Altera Phase-Locked Loop Reconfiguration IP Core - Manual (Page 2)

Page 2 Common Applications
Phase-Locked Loop Reconfiguration (ALTPLL_RECONFIG) Megafunction February 2012 Altera Corporation
f For more details about these features, refer to the Clock Networks and PLLs chapter of
the respective device handbook.
Common Applications
Use the ALTPLL_RECONFIG megafunction in designs that must support dynamic
changes in the frequency and phase shift of clocks and other frequency signals. The
megafunction is also useful in prototyping environments because it allows you to
sweep PLL output frequencies and dynamically adjust the output clock phase. For
example, a system generating test patterns is required to generate and transmit
patterns at 50 or 100 MHz, depending on the device under test. Reconfiguring the PLL
components in real-time allows you to switch between two such output frequencies
within a few microseconds. You can also adjust the clock-to-output (tCO) delays in
real-time by changing the output clock phase shift. This approach eliminates the need
to regenerate a configuration file with the new PLL settings.
Reconfigurable PLLs are very useful in DDR 2 and DDR 3 interfaces to implement the
dynamic data path (via the ALTMEMPHY megafunction). The PLL is needed to drive
the DLL used in the dynamic external memory interface operation. This operation
requires dynamic phase-shifting.
f For more information about dynamic phase-shifting in DDR 2 and DDR 3 interfaces,
refer to the
ALTMEMPHY Megafunction User Guide .
In addition, you can dynamically configure Stratix III, Stratix IV, Cyclone III,
Cyclone IV, and Arria II GX PLLs by using multiple configuration files stored on the
external ROM.
Device Family Support
The megafunction supports the Stratix series (excluding Stratix V), HardCopy series,
Arria GX series, and Cyclone series devices.
Resource Utilization and Performance
For details about the resource usage and performance of the ALTPLL_RECONFIG
megafunction in various devices, refer to the compilation reports in the Quartus II
software.
To view the compilation reports for the ALTPLL_RECONFIG megafunction in the
Quartus II software, follow these steps:
1. On the Processing menu, click Start Compilation to run a full compilation.
2. After compiling the design, on the Processing menu, click Compilation Report.
3. In the Table of Contents browser, expand the Fitter folder by clicking the “+” icon.
4. Under Fitter, expand Resource section, and select Resource Usage Summary to
view the resource usage information.
5. Under Fitter, expand Resource section, and select Resource Utilization by Entity
to view the resource utilization information.