Altera HardCopy II Clock Uncertainty Calculator - Manual (Page 15)

Altera Corporation 2–1
Chapter 2. Launching the
HardCopy II Clock
Uncertainty Calculator
Release
Information Table 2–1 provides information about the version of HardCopy ® II Clock
Uncertainty Calculator spreadsheet documented in this user guide.
Device Family
Support The HardCopy II Clock Uncertainty Calculator supports the following
HardCopy II devices in Commercial and Industry temperature ranges:
■ HC240
■ HC230
■ HC220
■ HC210
■ HC210W (Use HC210 clock uncertainty value for HC210W)
The HardCopy II Clock Uncertainty Calculator was developed for
calculating the clock uncertainties caused by clock jitter, duty cycle
distortion, and phase shift error. With different interfaces of the clock
transferring on the chip, you may have different outcomes for the clock
uncertainty.
As shown in Figure 2–1 , the HardCopy II Clock Uncertainty Calculator
covers clock transfer at the following locations:
■ Within core
■ Between the core and I/O
■ Between the core and SERDES/DDR blocks
Table 2–1. HardCopy II Clock Uncertainty Calculator Spreadsheet Version
Device Family
HardCopy II Clock Uncertainty
Calculator Spreadsheet Version
HardCopy II 2.2 and later