Altera HardCopy II Clock Uncertainty Calculator User Manual
Page 45
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![background image](/files/763726/content/doc045.png)
Altera Corporation
A–13
HardCopy II Clock Uncertainty Calculator User Guide
shows an example of a clock-pair = Off-chip to CLK8
Figure A–13. Input Interface without PLL
shows input of the PLL index for
, with respect to
the source and destination clocks.
1
If no PLL exists, enter “
0” for both the source and destination
clocks.
shows an example of a clock-pair = CLK12 to Off-chip
Figure A–14. Output Interface without a PLL
INBUF
CLK8
Destination
Register
DATA
Destination
Clock
Table A–13. Location of Input PLLs
Source Clock
Destination Clock
1st PLL
2nd PLL
1st PLL
2nd PLL
0
—
0
—
INBUF
CLK12
Source
Register
DATA
Source
Clock
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