Altera Transceiver Signal Integrity - Manual (Page 23)

February 2013 Altera Corporation Transceiver Signal Integrity Development Kit,
Stratix V GT Edition User Guide
5. Board Update Portal
This kit ships with the Board Update Portal design example stored in the factory
portion of the flash memory on the board. The design consists of a Nios II embedded
processor, an Ethernet MAC, and an HTML web server.
When you power up the board with the PGMSEL jumper (J28) in the factory position
(jump pins 2-3), the Stratix V GT FPGA configures with the Board Update Portal
design example. The design can obtain an IP address from any DHCP server and
serve a web page from the flash on your board to any host computer on the same
network. The web page allows you to upload new FPGA designs to the user portion
of flash memory and provides kit-specific links and design resources.
1
After successfully updating the user flash memory, you can load the user design from
flash memory into the FPGA. To do so, set the PGMSEL jumper (J28) to the user
position (jump pins 1-2) and power cycle the board.
The source code for the Board Update Portal design resides in the <install
dir>\kits\stratixVGT_5sgtea7_si\examples directory. If the Board Update Portal is
corrupted or deleted from the flash memory, refer to
“Restoring the Flash Device to
the Factory Settings” on page A–4 to restore the board with its original factory
contents.
Connecting to the Board Update Portal Web Page
This section provides instructions to connect to the Board Update Portal web page.
1 Before you proceed, ensure that you have the following:
■ A PC with a connection to a working Ethernet port on a DHCP enabled network.
■ A separate working Ethernet port connected to the same network for the board.
■ The Ethernet and power cables that are included in the kit.
To connect to the Board Update Portal web page, perform these steps:
1. With the board powered down, set the PGMSEL jumper (J28) to the factory
position (jump pins 2-3).
2. Attach the Ethernet cable from the board (J29) to your LAN.
3. Power up the board. The board connects to the LAN’s gateway router and obtains
an IP address. The LCD on the board displays the IP address.
4. Launch a web browser on a PC that is connected to the same network, and enter
the IP address from the LCD into the browser address bar. The Board Update
Portal web page appears in the browser.
1 You can click Transceiver Signal Integrity Development Kit, Stratix V GT
Edition on the Board Update Portal web page to access the kit’s home page
for documentation updates and additional new designs.