Using the board test system, The configure menu, The system info tab – Altera Transceiver Signal Integrity User Manual

Page 27: Using the board test system –3, The configure menu –3 the system info tab –3

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Chapter 6: Board Test System

6–3

Using the Board Test System

February 2013

Altera Corporation

Transceiver Signal Integrity Development Kit,

Stratix V GT Edition User Guide

1

In Windows, click Start > All Programs > Altera > Transceiver Signal Integrity
Development Kit, Stratix V GT Edition

<version> > Board Test System to run the

application.

A GUI appears, displaying the application tab that corresponds to the design running
in the FPGA. The development board’s flash memory ships preconfigured with the
design that corresponds to the GPIO and Flash tabs.

1

If you power up your board with the PGMSEL jumper (J28) in the factory position
(jump pins 2-3), or if you load your own design into the FPGA with the Quartus II
Programmer, you receive a message prompting you to configure your board with a
valid Board Test System design. Refer to

“The Configure Menu”

for information about

configuring your board.

Using the Board Test System

This section describes each control in the Board Test System application.

The Configure Menu

Use the Configure menu (

Figure 6–2

) to select the design you want to use. Each design

example tests different functionality that corresponds to one or more application tabs.

To configure the FPGA with a test system design, perform the following steps:

1. On the Configure menu, click the configure command that corresponds to the

functionality you wish to test.

2. In the dialog box that appears, click Configure to download the corresponding

design’s Raw Binary File (.rbf) to the FPGA. The download process usually takes
less than a minute.

3. When configuration finishes, close the Quartus II Programmer, if open. The design

begins running in the FPGA. The corresponding GUI application tabs that
interface with the design are now enabled.

The System Info Tab

The System Info tab shows information about the board’s current configuration.

Figure 6–1 on page 6–1

shows the System Info tab. The tab displays the contents of

the MAX II registers, the JTAG chain, the board’s MAC address, the flash memory
map, and other details stored on the board.

The following sections describe the controls on the System Info tab.

Figure 6–2. The Configure Menu

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