Altera Stratix V Advanced Systems Development Board User Manual
Page 38
2–28
Chapter 2: Board Components
General User Input/Output
Stratix V Advanced Systems Development Board
January 2014
Altera Corporation
Reference Manual
D17.3
FPGA1_LED_G3
2.5-V
AT11
D17.4
FPGA1_LED_R3
1.5-V
AV13
D9.3
FPGA1_LED_G4
1.5-V
G23
D9.4
FPGA1_LED_R4
1.5-V
C22
D8.3
FPGA1_LED_G5
2.5-V
AY9
D8.4
FPGA1_LED_R5
2.5-V
BA9
D7.3
FPGA1_LED_G6
1.5-V
H22
D7.4
FPGA1_LED_R6
1.5-V
N19
D6.3
FPGA1_LED_G7
2.5-V
BB8
D6.4
FPGA1_LED_R7
2.5-V
BD8
FPGA2 User LEDs
D31.3
FPGA2_LED_G0
1.5-V
N22
D31.4
FPGA2_LED_R0
1.5-V
N19
D30.3
FPGA2_LED_G1
1.5-V
AH19
D30.4
FPGA2_LED_R1
1.5-V
AH22
D29.3
FPGA2_LED_G2
1.5-V
V27
D29.4
FPGA2_LED_R2
1.5-V
P23
D28.3
FPGA2_LED_G3
1.5-V
F16
D28.4
FPGA2_LED_R3
1.5-V
G16
D25.3
FPGA2_LED_G4
1.5-V
AV13
D25.4
FPGA2_LED_R4
1.5-V
AP13
D24.3
FPGA2_LED_G5
1.5-V
AF17
D24.4
FPGA2_LED_R5
1.5-V
AR16
D23.3
FPGA2_LED_G6
1.5-V
AJ13
D23.4
FPGA2_LED_R6
1.5-V
AF13
D22.3
FPGA2_LED_G7
1.5-V
BC14
D22.4
FPGA2_LED_R7
1.5-V
BA15
Table 2–17. User-Defined LED Schematic Signal Names and Functions (Part 2 of 2)
Board Reference
Schematic Signal Name
I/O Standard
Stratix V GX FPGA Device
Pin Number