Altera Stratix V Advanced Systems Development Board User Manual
Page 8
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1–4
Chapter 1: Overview
Development Board Component Blocks
Stratix V Advanced Systems Development Board
January 2014
Altera Corporation
Reference Manual
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Memory interfaces
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DDR3 SDRAM
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Two 1024-MB interfaces with 64-bit data bus
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Two 512-MB interfaces with 32-bit data bus
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Four 4.5-MB QDRII+ SRAM with 18-bit data bus
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One 72-MB MoSys Bandwidth Engine IC SRAM with 16-bit data bus
(16x10.3125 G XCVR)
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One 32-MB serial flash
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General user I/O
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LEDs
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16 user LEDs
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Two HSMC interface LEDs transmit/receive (TX/RX)
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One PCI Express LEDs
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Push buttons and DIP switches
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One CPU reset push button
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Three general user push buttons
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Eight general user DIP switches
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