Measurement Computing CB-7080 - Manual (Page 12)

CB-7080 & CB-7080D Counter/Timer User's Guide Application notes
1-8
Table 1-4 Digital Alarm Configuration
D/O 0 D/O 1
Frequency mode D/O 0 D/O 1
Counter mode and alarm disabled D/O 0 D/O 1
Counter mode and alarm enable
(alarm mode 1, ~AAA1) High-alarm on counter 0 High-high alarm on counter 0
Counter mode and alarm enable (alarm
mode 0, ~AAA0 and @AAEA0) Alarm on counter 0 D/O 1 or alarm on counter 1
Counter mode and alarm enable (alarm
mode 0, ~AAA0 and @AAEA1) D/O 0 or alarm on counter 0 alarm on counter 1
Programmable threshold voltage setting
The programmable threshold voltage is valid for a non-isolated input of counter mode (50) and frequency
mode (51). The default settings are:
 TTL compatible
 Low trigger level = 0.8 volt
 High trigger level = 2.4 volts
You can change the high trigger level by the $AA1H (data) command. The low trigger can be changed by the
$AA1L (data) command. The high trigger level must be greater than
the low trigger level.
Digital filter setting
The digital filter is disabled in frequency mode (51). It is designed as a pulse-width filter for both high/low
pulses, and is valid for both non-isolated and isolated inputs. The digital filter can be enabled or disabled. Key
points of digital filter usage include:
1. Use $AABS to select the input signal.
2. Use $AA0H(data) to set the minimum width of high level.
3. Use $AA0L(data) to set the minimum width of low level.
4. Use $AA4S to enable/disable the digital filter (both channels).
If the high width of the input signal is smaller than the minimum high width of digital filter, the input signal is
filtered out. Also, the low width of the input signal must be greater than the minimum low width of digital
filter.
For example, if the width of the input signal is >1000

s, set the digital filter at 900

s. Therefore, all noise
<900

s is filtered out by the digital filter. These steps are given as follows:
 $AAB0
 $AA0H00900
 $AA0L00900
 $AA41