Measurement Computing CIO-DAS16/M1 - Manual (Page 29)

25
Digital Input / Output
Digital Type (Main Connector)
Input: 74LS244
Output: 74LS175
Configuration Two dedicated ports, 4 input and 4 output
Output High 2.7 volts @ -0.4mA min
Output Low 0.4 volts @ 8 mA min
Input High 2.0 volts min, 7 volts absolute max
Input Low 0.8 volts max, -0.5 volts absolute min
Digital Type (Auxiliary Connector) 82C55
Configuration 2 banks of 8, 2 banks of 4, programmable by bank as input
or output
Number of channels 24 I/O
Output High 3.0 volts min @ -2.5mA
Output Low 0.4 volts max @ 2.5mA
Input High 2.0 volts min, 5.5 volts absolute max
Input Low 0.8 volts max, -0.5 volts absolute min
Interrupts Prog. levels 2-7, 10-12, 14, 15; Positive edge triggered
Interrupt enable Programmable
Interrupt sources A/D End-of-conversion, A/D FIFO half full, A/D Residual
Counter
Counter section
Counter type 82C54
Configuration 3 down counters, 16 bits each
Counter 0 - General purpose counter or ADC residual sample
counter when using REPINSW.
Source: Programmable: external (CTR0IN), internal (1MHz
osc) or ADC pacer (when using REPINSW).
Gate: Programmable source: external (DIN2) or internal
(when using REPINSW)
Output: Programmable: user connector, end-of-acquisition
interrupt (when using REPINSW).
Counter 1 - ADC Pacer Lower Divider
Source: 10 MHz oscillator
Gate: Tied to Counter 2 gate, programmable source: external
(DIN1) or internal.
Output: Chained to Counter 2 Clock.
Counter 2 - ADC Pacer Upper Divider
Source: Counter 1 Output.
Gate: Tied to Counter 1 gate, programmable source: external
(DIN1) or internal.
Output: ADC Pacer clock, output available at user connector
(CTR2 Out).