Measurement Computing CIO-DAS16/M1 - Manual (Page 3)

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Table of Contents
1. SOFTWARE INSTALLATION .........................................................................................................................................................1
2. HARDWARE INSTALLATION ........................................................................................................................................................1
2.1 BASE ADDRESS ............................................................................................................................................................................1
2.2 USER-COUNTER CLOCK/CHAINING JUMPERS......................................................................................................................2
2.3 PACER CLOCK SOURCE SELECT JUMPER..............................................................................................................................2
2.4 INSTALLING THE CIO-DAS16/M1 IN THE COMPUTER .........................................................................................................3
2.5 PROGRAMMABLE RANGE AND GAIN SETTING ...................................................................................................................3
3. SIGNAL CONNECTIONS..................................................................................................................................................................4
3.1 INTRODUCTION ...........................................................................................................................................................................4
3.2 ANALOG CONNECTOR DIAGRAM............................................................................................................................................4
3.2.1 Analog Inputs ............................................................................................................................................................................5
3.2.2 Connecting Analog Inputs.........................................................................................................................................................5
1.1.3 Shielding ...................................................................................................................................................................................5
1.1.4 Grounded Signal Source ...........................................................................................................................................................5
1.1.5 Floating Signal Source..............................................................................................................................................................6
1.1.6 Avoiding Ground Loops ............................................................................................................................................................6
1.3 DIGITAL OUTPUTS & INPUTS....................................................................................................................................................7
1.3.1 Digital Output Connector .........................................................................................................................................................7
1.3.2 Counter Clock Jumper ..............................................................................................................................................................7
1.3.3 Cabling the Digital Connector..................................................................................................................................................7
4. REGISTER ARCHITECTURE........................................................................................................................................................10
4.1 DATA TRANSFERS .....................................................................................................................................................................10
4.2 FIFO DATA BUFFER ...................................................................................................................................................................10
4.3 CHANNEL/GAIN QUEUE ...........................................................................................................................................................10
4.4 CHANNEL/GAIN MEMORY CONTENTS REGISTER .............................................................................................................11
4.5 DT-CONNECT ..............................................................................................................................................................................12
4.6 CONTROL & DATA REGISTERS...............................................................................................................................................12
4.6.1 A/D Data & Channel Registers ...............................................................................................................................................14
4.6.2 Control & Status Bits ..............................................................................................................................................................14
4.6.3 Four-Bit Digital I/O Registers ................................................................................................................................................15
4.6.4 Clear Interrupt Status Register ...............................................................................................................................................16
4.6.5 Interrupt Control, Pacer Source Register ...............................................................................................................................16
4.6.6 Channel Gain Queue Address Register...................................................................................................................................17
4.6.7 Channel Gain Queue Data Register........................................................................................................................................18
4.6.8 Total Counter Data & Control Registers ................................................................................................................................19
4.6.9 Digital I/O and Counter Control & Data Registers ...............................................................................................................20
4.6.10 82C55 Digital I/O Registers..................................................................................................................................................21
4.6.11 COUNTER CHIP (82C54) ....................................................................................................................................................23
5. SPECIFICATIONS............................................................................................................................................................................24
6. ELECTRONICS AND INTERFACING..........................................................................................................................................27
6.1 COMMON MODE.........................................................................................................................................................................27
6.2 COMMON MISUNDERSTANDINGS .........................................................................................................................................28
6.3 GROUND
LOOPS .........................................................................................................................................................................28
6.4 PULL UP & PULL DOWN RESISTORS .....................................................................................................................................28
6.5 TTL TO SOLID STATE RELAYS................................................................................................................................................29
6.6 VOLTAGE DIVIDERS .................................................................................................................................................................30
6.7 LOW PASS FILTERS ...................................................................................................................................................................32