Sundance SMT329 - Manual (Page 8)

3 Acronyms, Abbreviations and Definitions
3.1 Acronyms and Abbreviations
C60
The terms C60, C64xx and TMS320C64xx are used interchangeably throughout this
document.
3.2 Definitions
Register Descriptions
The format of registers is described using diagrams of the following form:
31–24 23–16 15–8 7–0
LEVEL
R,00000000 RW,10000000 R,00000000 R,10000000
The digits at the top of the diagram indicate bit positions within the register and the central
section names bits or bit fields. The bottom row describes what may be done to the field and
its value after reset. Shaded fields are reserved and should only ever be written with zeroes.
R
= Readable by the CPU
W = Writeable by the CPU
RW = Readable and writeable by the CPU
Binary digits indicate the value of the field after reset.
Byte Addressing
All byte addresses are “Big Endian”. This is defined as follows:
Decreasing numeric significance with increasing memory addresses.
So for the register definition shown above:
Bits 31-24
= Byte Address 0
Bits 23-16 = Byte Address 1
Bits 15-8 = Byte Address 2
Bits 7-0 = Byte Address 3
Care must be taken when using an Intel (PC) little endian based VME host controller, to
ensure the use of either hardware or software byte swapping when accessing the SMT329
over the VME bus.
VME64 and legacy VME systems
A VME64 system meets the ANSI/VITA specification for VME64, with 160 pin backplane
connectors and a 3.3 Volt backplane supply.
User Manual SMT329 Last Edited: 09/02/2007 10:58:00