Verilink 1558A (34-00228) Product Manual - Manual (Page 34)

LAPS Operation 4 -11 1558A APS
A Line loopback loops the incoming T1 signal from the
facility back to the network. Only the T1 signal level is
regenerated, not the CRC. In addition to looping the signal
back to the network, the signal is also passed to the 1558A
DTE port.
To unloop the unit, simply move the cursor highlight to the
Unloop field and toggle the field, using the space bar, until
CO Line is displayed. Then depress the <return/enter> key.
The LAPS will issue a line unloop command. After a few
moments note that the NEAR status field changes from Ln
Lp to Soft Inhibit or Standby. Also note that the LP LED
indicator on the 1558A turns off. The CO Line loop is now
off.
4.8.3 CO Facility Loop
Target the path (A or B) that you want to test by moving the
cursor highlight to the Target: field and then, using the spa-
cebar, toggle the field until it displays the to side that you
want to loop (Side A or Side B). After you have selected
either the A or B side as the target for testing, move the cur-
sor highlight to the Loop field and toggle the field, using the
space bar, until the field displays CO Facility. Then momen-
tarily depress the <return/enter> key. The LAPS will initiate
a CO Facility loop of the selected target. After a few
moments, notice that the NEAR status field has changed
from Soft Inhibit or Standby to Fac LP. Also note that the
1558A front panel Loop LED indicator is on.
B
NET
-20 to 56 VDC/RTN
(Power A)
-20 to 56 VDC/RTN
(Power B)
Power
COM Bus
DTE
RJ48
Rx
Tx
Rx
Supply ±
12 VDC
+5 VDC
Tx
Power
Line
Deframer
NET A
Framer
Loop
Line
Protection
Fac.
Loop
PLB
APS
Select
Path A /B
Bridge
Jack
Receive
Jack
NET A
Bridge
Jack
Transmit
Jack
A
RJ48
Line
Protection
NET
Rx
Tx
Line
Deframer
NET B
Framer
Loop
Line
Protection
Fac.
Loop
PLB
Bridge
Jack
Receive
Jack
NET B
Bridge
Jack
Transmit
Jack
B
RJ48
Line
Protection
Framer
Deframer
Eq.
Loop
Line
Protection
Line
Protection
Bridge
Jack
Receive
Jack
Bridge
Jack
Transmit
Jack
DTE
DTE
Bypass Mode
(Path A to DTE)
Fault
CPU
Fault
Signal
Split
A
ROM
RAM
CPU
Loop
Set/Reset
SUPV
Port
Performance History,
Alarms, Unit Address
OUT
COM Bus
IN
Alarm
Contacts
(COM,
NO, NC)
BERT: QRSS,
1:8, 3:24, etc.
NET B
NET A
Figure 4 -2 1558A Block Diagram