Verilink 2048 (34-00179) Product Manual - Manual (Page 10)

Installation 2-3 2048 PMU/NTU
located on the bottom of the PC board (refer to the bottom
circuit board view in Figure 2-1).
The output level is factory set at 0 dB. It may be attenuated
by -7.5 dB or by -15 dB if operating conditions require that
it be changed. The PTT should provide the proper setting to
the user.
If unsure of the exact setting, then slide to 0 dB.
2.5.4 Switch S2 (Chassis Operation)
Switch S2 is used to swap the DTE transmit and receive pair
(Tx/Rx) for either normal stand-alone use or for rack mount
use. It is located on the bottom of the PC board (refer to the
bottom circuit board view in Figure 2-1).
2.5.5 Switch S4 (Configuration)
During initial power up, four modes of configuring the 2048
are available using the first two positions of DIP Switch S4.
1) Boot from switch settings: Upon reset, the unit reads
its configuration from the hardware switch settings
described in this chapter.
2) Boot from manager: Upon reset, the unit requests con-
figuration information from the EM8000 element manager.
If the manager is not on-line, the unit will boot from RAM.
3) Boot from RAM: Upon reset, the unit reads its configu-
ration from the internal, battery-backed RAM.
4) Boot from ROM: Upon reset, the unit reads its configu-
ration from the internal ROM. The ROM factory default set-
tings are as follows:
Signalling: CAS
Network CRC4: Enabled
DTE CRC4: Enabled
Line Code: HDB3
Inband Loop Code: Enabled
AIS: Unframed all ones
Keep Alive: AIS
BERT Ones polarity: 1 (normal)
National Bit Position: 4
National Bits: Pass
BERT Polarity: Normal
2.5.6 Switch S5 (Configuration)
DIP Switch S5 is used to set the following configuration
parameters on the 2048 unit.
One’s Polarity: Position S5 -1 sets the bit error rate test
(BERT) data ones polarity to either a 1 or 0.
Down: ‘1’ Up: ‘0’ (Inverted)
IBLC: Position S5-2 enables inband 5-bit (10000) loop up
code and 3-bit (100) loop down code detection.
Down: Enabled Up: Disabled
Line Framing: Position S5-3 is used to match the PMU to
the framing format used. The options are CAS (Channel
Associated Signalling) or CCS (Common Channel Signal-
ling). CAS is also referred to as PCM30, (or CAS Multi-
frame). CAS framing also includes an additional FAS sync
word in time slot 16, frame 0.
Down: CAS Up: CCS
CCS is also referred to as PCM31 (or no Multiframe). It
contains alternating aligned frames and non-aligned frames.
If the PMU is configured for CCS, it will pass both CCS and
CAS framing data. In this case, the additional FAS sync
word in the CAS mode is passed as data and the PMU does
not try to sync on the additional sync word.
If CAS framing is used, then a more rigid sync and error
detection is used by the PMU. If CAS is selected, the PMU
expects CAS framing. If CCS framing is used, the PMU
declares an out of sync condition and transmits the Keep
Spares
Pos 1 Pos 2 Power Up (Boot) Mode
Dn Dn Boot from Switches
Dn Up Boot from Manager
Up Dn Boot from RAM
Up Up Boot from ROM
7 6 5 4 3 2 1 8
Dn
Up
Switch
S4
7 6 5 4 3 2 1 8
D
n
U
p
O
n
e
s
P
o
la
ri
ty
1
IB
L
C
E
n
ab
le
S
ig
n
al
C
A
S
C
o
d
e
H
D
B
3
C
R
C
4
E
n
ab
le
A
IS
/
K
A
A
IS
/
K
A
I
n
se
rt
C
R
C
D
is
ab
le
O
n
e
s
P
o
la
ri
ty
0 IB
L
C
D
is
ab
le
S
ig
n
a
l
C
C
S
C
o
d
e
A
M
I
C
R
C
4
D
is
ab
le
A
IS
/
K
A
A
IS
/
K
A
In
se
rt
C
R
C
E
n
a
b
le
Switch
S5