Escort 3016B User Manual
Page 106

15
Ethernet interface
Page 8
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a bit of the status register of the alarms switches from 0 to 1 while
the corresponding bit in its validation register is 1
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a bit of the validation register of the alarms switches from 0 to 1
while the corresponding bit in its status register is 1.
The bit #5 (ESB: Event Status Bit, value 32) includes the recapitulative message of the status
register of standard events (see the details of these bits in the description of this register). Its status
shows whether one or several authorised events have occurred in the status register of standard
events since its latest reset (an event is permitted if the corresponding bit in the validation register
of events is 1).
The bit #4 (MAV: Message AVailable, value 16) includes the recapitulative message of the output
queue. Its status shows whether a message or some data from the appliance are ready for sending
via the interface (ex: answer to an interrogation instruction).
The bits #7 and 3, 2 ,1, 0 are used to receive recapitulative messages defined by the appliance. In
the case of the recorder, the bit #0 is used while the bits #1, 2, 3, 7 always remain at 0.
The bit #0 includes the recapitulative message of the status register of the alarms (see the details of
these bits in the description of this register). Its status shows whether one or several authorised
events have occurred in the status register of the alarms since its latest reset.
Validation register:
The status byte is associated with a validation register that makes it possible to control the service
request and that allows only some cases.
When a bit is equal to 1, it makes it possible that the status 1 of the bit of same rank of the status
register (STB) leads to the activation of the bit #6 in the same status register.
Writing into the validation octet is made by the *SRE<NRF> command, where <NRF> is the sum
of the values of binary weights of the bits 0 to 5 and 7.
Reading the validation octet is made with
the *SRE? instruction. The answer is returned in decimal (NR1).
14.4.3.Registers of standard events
See the overview of the structures of status data.
The structure of the standard event registers is assigned to the bit #5 of the service request register.
Status register:
This register includes standard specific messages whose meaning is exposed thereafter.
You can read its content with the *ESR? command
Reading the register leads to its erasure.
The bits of the status register of the events are assigned to specific events:
* Bit 7:
POWER-UP (value 128)
It shows that the power supply is on
* Bit 6:
REQUEST FOR USE (value 64)
Not used, set to 0
* Bit 5:
INSTRUCTION ERROR (value 32)
This bit shows that an unknown or incorrect instruction has been sent to the recorder
* Bit 4:
EXECUTION ERROR (value 16)
Not used, set to 0
* Bit 3:
ERROR FROM THE APLIANCE (value 8)
Not used, set to 0
* Bit 2:
INTERROGATION ERROR (value 4)