Interphase Tech CONDOR 4221 - Manual (Page 71)

Onboard Command Queue Entry
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Onboard Command Queue Entry
The host issues a command to the controller through a Command Queue Entry (CQE). Two types are provided: the
Master Command Entry (MCE), located at offset 0x0010 is used to issue control commands, such as Initialize
Controller, Report Network Statistics, and the like. The normal Command Queue Entry (CQE) is a circular queue of
CQE elements located immediately after the MCE, which the host uses to post Transmit and Receive commands. The
host specifies the number of elements in this circular list via the Initialize Controller command. The host submits a
command by filling out the command IOPB structure, filling out a Command Queue Entry pointing to the command,
and then setting the GO bit in the CQE. This signals the controller that the command is available, and it is picked up
as a soon as possible.
If the host locates the IOPB in controller-provided Short I/O space, an Onboard Command Queue structure is used to
submit the command. If the IOPB is located in host-provided system memory, an Offboard Command Queue structure
is used.
Table 3-5. Onboard Command Queue Entry
Queue Entry Control Register (QECR)
Table 3-6. Queue Entry Control Register
This field controls the submission of the associated command. The following bits are defined:
Go/busy (GO)
This bit is set by the host to initiate action on the Command Queue entry. Before this bit is set, an IOPB must
be assembled for this entry, and the entire Command Queue must be valid.
Upon detecting the Go bit set, the controller will move the CQE and IOPB into internal memory, and then
clear this bit, indicating that the host may use these locations to submit another command.
Onboard Command Queue Entry
Offst 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0x00 Queue Entry Control Register
0x01 Reserved
0x02
0x03 Command Tag
(4 Bytes)
0x04 Reserved Work Queue Number
0x05 Reserved
Queue Entry Control Register
Offst 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0x00 FIP FOB GO