Samsung MUXONENAND A-DIE KFM2G16Q2A - Manual (Page 164)

MuxOneNAND2G(KFM2G16Q2A-DEBx)
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MuxOneNAND4G(KFN4G16Q2A-DEBx)
6.22 Toggle Bit Timing in Asynchronous Read (VA Transition Before AVD Low)
See AC Characteristics Table 5.5
NOTE :
1) VA=Valid Read Address, RD=Read Data.
2) Before IOBE is set to 1, RDY and INT pin are High-Z state.
3) Refer to chapter 5.5 for tASO description and value.
6.23 Toggle Bit Timing in Asynchronous Read (VA Transition After AVD Low)
See AC Characteristics Table 5.5
NOTE :
1) VA=Valid Read Address, RD=Read Data.
2) Before IOBE is set to 1, RDY and INT pin are High-Z state.
3) Refer to chapter 5.5 for tASO description and value.
t OE
Status RD 1)
t CE t OEZ
t AVDP
CE
OE
WE
A/DQ0:
AVD
A/DQ15
Hi-Z
RDY 2)
t AA
t RC
t CA
t CEZ
t CER
t AVDO
Hi-Z
VA Status RD
Hi-Z
t ASO
t AAVDH
t AAVDS
VA 1)
t OE
Status RD 1)
t OEZ
t
ACC
t AAVDH
t AVDP
t AAVDS
CE
OE
WE
A/DQ0:
AVD
A/DQ15
t CEZ
t CA
t CER
t AVDO
Hi-Z
Hi-Z
RDY 2)
t RC
t CE
Hi-Z
VA Status RD
t CA
t ASO
VA 1)