14 block erase operation timing, Flex-muxonenand4g(kfm4gh6q4m-debx) – Samsung FLEX-MUXONENAND KFN8GH6Q4M User Manual

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Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)

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FLASH MEMORY

Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)

Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)

6.14 Block Erase Operation Timing

See AC Characteristics Table 5.7 and Table 5.9

NOTE :
1) AA = Address of address register

CA = Address of command register
ECD = Erase Command
EMA = Address of memory to be erased
SA = Address of status register

2) For “In progress” and “complete” status, refer to status register.
3) Status reads in this figure is asynchronous read, but status read in synchronous mode is also supported.

Erase Command Sequence

WE

CE

CLK

t

AVDP

t

AAVDS

t

AAVDH

t

DS

t

DH

t

CH

t

WPL

t

WPH

t

WC

SA

SA

In

Progress

Completed

ECD

CA

EMA

AA

A/DQ0:

A/DQ15

OE

Read Status Data

V

IL


t

WEA

t

BERS1

INT

t

CS

AVD

t

CER

Hi-Z

t

CEZ

t

CER

bit

t

CEZ

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