0 device description, 1 detailed product description, 2 definitions – Samsung FLEX-MUXONENAND KFN8GH6Q4M User Manual

Page 7: Flex-muxonenand4g(kfm4gh6q4m-debx)

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Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)

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FLASH MEMORY

Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)

Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)

2.0 DEVICE DESCRIPTION

2.1 Detailed Product Description

The Flex-MuxOneNAND is an advanced generation, high-performance MLC NAND-based Flash memory(Which can be programmed as both
SLC and MLC).

It integrates on-chip a convertible(SLC and MLC) NAND Flash Array memory with two independent data buffers, boot RAM buffer, a page
buffer for the Flash array, and a one-time-programmable block.

The combination of these memory areas enable high-speed pipelining of reads from host

,

BufferRAM

,

Page Buffer

,

and NAND Flash Array.

Clock speeds up to 66MHz / 83MHz with a x16 wide I/O yields a 83MByte/second in SLC and 71MByte/second in MLC read bandwidth

The Flex-MuxOneNAND also includes a Boot RAM and boot loader. This enables the device to efficiently load boot code at device startup
from the NAND Array without the need for off-chip boot device.

One block of the NAND Array is set aside as an OTP memory area, and 1st Block (Block 0) can be used as OTP area. This area, available to
the user, can be configured and locked with secured user information.

On-chip controller interfaces enable the device to operate in systems without NAND Host controllers.

2.2 Definitions

B (capital letter)

Byte, 8bits

W (capital letter)

Word, 16bits

b (lower-case letter)

Bit

ECC

Error Correction Code

Calculated ECC

ECC that has been calculated during a load or program access

Written ECC

ECC that has been stored as data in the NAND Flash array or in the BufferRAM

BufferRAM

On-chip internal buffer consisting of BootRAM and DataRAM

BootRAM

A 1KB portion of the BufferRAM reserved for Boot Code buffering

DataRAM

A 4KB portion of the BufferRAM reserved for Data buffering (2KB x2)

Sector

Part of a Page of which 512B is the main data area and 16B is the spare data area.

Data unit

Possible data unit to be read from memory to BufferRAM or to be programmed to memory.
- 4224B of which 4096 is in main area and 128B in spare area

DDP

Dual Die Package

QDP

Quad Die Package

OTP

One Time Programmable

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