Texas Instruments TMS320F2802 User Manual

Page 2

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TMS320F2809, TMS320F2808, TMS320F2806
TMS320F2802, TMS320F2801, TMS320C2802
TMS320C2801, TMS320F28016, TMS320F28015

www.ti.com

SPRS230N – OCTOBER 2003 – REVISED MAY 2012

Contents

1

F280x, F2801x, C280x DSPs

..................................................................................................

8

1.1

Features

......................................................................................................................

8

1.2

Getting Started

..............................................................................................................

9

2

Introduction

......................................................................................................................

10

2.1

Pin Assignments

...........................................................................................................

13

2.2

Signal Descriptions

........................................................................................................

18

3

Functional Overview

..........................................................................................................

24

3.1

Memory Maps

..............................................................................................................

25

3.2

Brief Descriptions

..........................................................................................................

33

3.2.1

C28x CPU

.......................................................................................................

33

3.2.2

Memory Bus (Harvard Bus Architecture)

....................................................................

33

3.2.3

Peripheral Bus

..................................................................................................

33

3.2.4

Real-Time JTAG and Analysis

................................................................................

34

3.2.5

Flash

.............................................................................................................

34

3.2.6

ROM

..............................................................................................................

34

3.2.7

M0, M1 SARAMs

...............................................................................................

34

3.2.8

L0, L1, H0 SARAMs

............................................................................................

35

3.2.9

Boot ROM

.......................................................................................................

35

3.2.10

Security

..........................................................................................................

36

3.2.11

Peripheral Interrupt Expansion (PIE) Block

.................................................................

37

3.2.12

External Interrupts (XINT1, XINT2, XNMI)

..................................................................

37

3.2.13

Oscillator and PLL

..............................................................................................

37

3.2.14

Watchdog

........................................................................................................

37

3.2.15

Peripheral Clocking

.............................................................................................

37

3.2.16

Low-Power Modes

..............................................................................................

37

3.2.17

Peripheral Frames 0, 1, 2 (PFn)

..............................................................................

38

3.2.18

General-Purpose Input/Output (GPIO) Multiplexer

.........................................................

38

3.2.19

32-Bit CPU-Timers (0, 1, 2)

...................................................................................

38

3.2.20

Control Peripherals

.............................................................................................

38

3.2.21

Serial Port Peripherals

.........................................................................................

39

3.3

Register Map

...............................................................................................................

39

3.4

Device Emulation Registers

..............................................................................................

41

3.5

Interrupts

....................................................................................................................

41

3.5.1

External Interrupts

..............................................................................................

44

3.6

System Control

............................................................................................................

45

3.6.1

OSC and PLL Block

............................................................................................

46

3.6.1.1

External Reference Oscillator Clock Option

....................................................

47

3.6.1.2

PLL-Based Clock Module

.........................................................................

48

3.6.1.3

Loss of Input Clock

................................................................................

49

3.6.2

Watchdog Block

.................................................................................................

50

3.7

Low-Power Modes Block

.................................................................................................

51

4

Peripherals

.......................................................................................................................

52

4.1

32-Bit CPU-Timers 0/1/2

.................................................................................................

52

4.2

Enhanced PWM Modules (ePWM1/2/3/4/5/6)

.........................................................................

54

4.3

Hi-Resolution PWM (HRPWM)

..........................................................................................

57

4.4

Enhanced CAP Modules (eCAP1/2/3/4)

...............................................................................

57

4.5

Enhanced QEP Modules (eQEP1/2)

....................................................................................

60

4.6

Enhanced Analog-to-Digital Converter (ADC) Module

...............................................................

62

4.6.1

ADC Connections if the ADC Is Not Used

..................................................................

65

4.6.2

ADC Registers

..................................................................................................

66

4.7

Enhanced Controller Area Network (eCAN) Modules (eCAN-A and eCAN-B)

....................................

67

2

Contents

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