4 spi chip select register, Spi chip select register -14 – ARM IM-AD1 User Manual

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Reference Design Example

4-14

Copyright © 2001-2003. All rights reserved.

ARM DUI 0163B

4.4

SPI chip select register

This is a 3-bit read/write register that controls the three chip select signals on the
connectors J11 and J13. Writing a 1 causes the associated SPI chip select signal to go
LOW.

Table 4-8 SPI chip select register bit assignment

Bit

Name

Access

Function

2

SPICS2

Read/write

0 = SPI_nCS2 is HIGH

1 = SPI_nCS2 is LOW

1

SPICS1

Read/write

0 = SPI_nCS1 is HIGH

1 = SPI_nCS1 is LOW

0

SPICS0

Read/write

0 = SPI_nCS0 is HIGH

1 = SPI_nCS0 is LOW

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