11 can controller interface, 1 canxbase, 2 can reset control register – ARM IM-AD1 User Manual

Page 72: Can controller interface -26

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Reference Design Example

4-26

Copyright © 2001-2003. All rights reserved.

ARM DUI 0163B

4.11

CAN controller interface

The CAN controller interface gives you access to the internal registers and reset signals
of the Bosch CC770 CAN controllers. The offset addresses of CAN controller
interfaces are shown in Table 4-14.

4.11.1

CANxBase

You use the register interface locations to read and write the CAN registers. Register
accesses take at least six system bus clock cycles and can be stretched by the CAN
controller to a maximum of 550ns plus three system clock cycles.

The address pins CAN_A[7:0] of the CAN controllers are connected to HADDR[9:2].
This means that individual CAN registers are located on word boundaries starting from
the base address of the device.

4.11.2

CAN reset control register

The CAN reset register controls the nRESET signals to the CAN controllers. The
assignment of the bits in the register is shown in Table 4-15.

The CAN controllers are reset by writing a 0 to the associated bit so the nRESET signal
goes LOW. The default setting of this register after power up is 0, so you must write a
1 before you can read and write the internal registers of the CAN controllers. However,
after power up the CAN resets must be held LOW for at least 1ms.

Table 4-14 CAN controller interface registers

Offset
address

Name

Function

0x000000

CAN1Base

Interface to CAN1 controller registers

0x100000

CAN2Base

Interface to CAN2 controller registers

0x200000

CANRESET

CAN reset control register

Table 4-15 CAN reset register bit assignment

Bit

Name

Access

Function

1

CAN2nRESET

Read/write

Controls the nRESET signal to CAN2.

0

CAN1nRESET

Read/write

Controls the nRESET signal to CAN1.

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