Achronix Speedster22i Interlaken User Manual

Page 38

Advertising
background image

0x014A

txstat

TX Status Register – R/W

Bit 3: Set to a value of 1 if tx_ovfout is asserted on the TX LBUS. Write

1 to clear.

Bit 2: Set to a value of 1 if an overflow occurs. This bit should never

be set and indicates a critical failure. Write 1 to clear.

Bit 1: Set to a value of 1 if a burst, less than BurstShort, not ending

with an EOP, is written into the TX. Write 1 to clear.

Bit 0: Set to a value of 1 if the serial data rate is faster than the

maximum data rate on the Local bus. Write 1 to clear.

0x0202

rxdecomm

RX Lane Decommissioning Register – R/W – Default: ‘h1717

Bits 15 indicates RX Has Bad Lane (ctl_rx_has_bad_lane)

Bits 12:8 - Rx Bad Lane

Bits 4:0 - Rx Last Lane (ctl_rx_last_lane)

0x0204

rxmframelen

RX Meta Frame Length Register – R/W
This input should be -1 the desired length. Thus for a Meta Frame of

2048, a value of 2047 should be used. This input is specified in terms

of the number of words or cycles minus one. For example, if set to

2047, then a Metaframe sync word is sent every 2048 word transfers

on every lane. See section 5.4.3 of Interlaken Protocol Definition

rev1.2.

0x0206

rxctrl

RX Burst Register – R/W – Default: ‘h0003

Bit 8 - Setting this bit to 1 changes the way the error handler report

errors. When this bit is a value of 0, it assumes packets are arriving

interwoven as segments. When this bit is a value of 1, it assumes

packets are arriving as complete packets. Use of this bit ensures that

packets delivered to the Local bus had the appropriate SOP and EOP

pairing. (ctl_rx_packet_mode)

Bits 1:0 - Specifies the maximum number of Data Words between

Burst Control Words expected by the RX. The following values are

defined: 00=64 bytes, 01=128 bytes, 10=192 bytes, 11=256 bytes.

(ctl_rx_burstmax)

UG032, May 15, 2014

38

Advertising