ADLINK cExpress-BL - Manual (Page 60)

Page 60 cExpress-BL
7.3.11 Advanced > PCI and PCIe > PCH-PCIe Configuration
Feature Options Description
PCH-PCIe Configuration Info only
PCI Express Clock Gating Disable
Enable Enable / Disable PCI Express Clock Gating for each root port.
DMI Link ASPM Control Disable
Enable The control of Active State Power Management on both NB side and SB
side of the DMI Link.
DMI Link Extended Synch Control Disable
Enable The control of Extended Synch on SB side of the DMI Link.
PCIE Root Port Function Swapping Disable
Enable Enable / Disable PCI Express PCI Express Root Port Function Swapping.
Subtractive Decode Disable
Enable Enable / Disable PCI Express Subtractive Decode.
PCIE Ports 1-4 Configuration 4x1 Port
1X2 2X1 Port
2X2 Port
1X4 Port To configure PCI-E Port 1-4 of PCH.
[4X1] : Port 1-4 (x1) and Port 8 (x1)
[1x2 2x1]: Port 1 (x2), Port 2 (disabled), Ports 3 and Port 4 (x1) [2x2] :
Port 1-2 (x2) and Port 3-4 (x2) / [1x4]:Port 1 (x4), Ports 2-4 (disable)
PCI Express Root Port 1~4 Submenu Configure PCI Express Root Port 1~4 setting.
PCIE Port 5 is assigned to LAN Info only
7.3.12 Advanced > PCI and PCIe > PCH-PCIe Configuration >PCI Express Root Port
Feature Options Description
PCI Express Root Port Disable
Enable Control the PCI Express Root Port.
ASPM Support Disabled
L0s
L1
L0sL1
Auto Set the ASPM Level: Force L0s - Force all links to L0s State : AUTO -
BIOS auto configure : DISABLE - Disables ASPM
L1 Substates Disabled
L1.1
L1.2
L1.1 & L1.2 PCI Express L1 Substates settings.
URR Disable
Enable Enable / Disable PCI Express Unsupported Request Reporting.
FER Disable
Enable Enable / Disable PCI Express Device Fatal Error Reporting.
NFER Disable
Enable Enable / Disable PCI Express Device Non-Fatal Error Reporting.
CER Disable
Enable Enable / Disable PCI Express Device Correctable Error Reporting.
CTO Disable
Enable Enable / Disable PCI Express Completion Timer TO.
SEFE Disable
Enable Enable / Disable Root PCI Express System Error on Fatal Error.