Document revision history – Altera User Flash Memory User Manual
Page 33
Comments
Description
Required
Port Name
(1)
Data register output.
Yes
drdout
If the osc port is
specified, the oscena
port is required.
(1)
Oscillator output.
No
osc
When the rtpbusy is
high, it cannot be used.
(1)
Busy signal that indicates
when in system configura-
tion is using flash memory.
Yes
rtpbusy
Note to Table 3–13:
1. This port is used without an interface protocol only.
Document Revision History
The following table lists the revision history for this document.
Table 31: DateVersionChanges
Changes
Version
Date
• Updated parameterization steps for legacy parameter editor.
• Added note that this IP core does not support Arria 10 designs.
2014.08.18
August, 2014
• Replaced MegaWizard Plug-In Manager information with IP
Catalog.
• Added standard information about upgrading IP cores.
• Added standard installation and licensing information.
• Removed outdated device support level information. IP core
device support is now available in IP Catalog and parameter
editor.
2014.06.30
June 2014
Updated Page Write value in Table 2–3 on page 2–5
3.2
May 2014
Updated “Parameter Settings” on page 2–1.
3.1
May 2012
Added MAX V support.
3.0
March 2012
Updated for Quartus II 6.0 software.
2.0
August 2006
Updated for Quartus II 4.2 software.
1.1
July 2005
Initial release.
1.0
May 2005
Altera Corporation
Altera User Flash Memory (ALTUFM) IP Core User Guide
33
Document Revision History
UG-040105
2014.08.18