Altera User Flash Memory - Manual (Page 24)

• Erase
The UFM block supports byte write, but does not support byte erase, requiring a sector-based erase sequence
prior to any programming or writing. If the data content of a specific byte location needs to be overwritten
in the UFM, the entire sector that byte resides in must be erased unless that byte location was already erased
(all 1s).
If your design allows you to access the MAX II and MAX VUFM (write or erase), you must ensure that all
the erase or write operations of the UFM are completed before starting any ISP session (including stand-
alone verify, examine, setting security bit, and reading the contents of the UFM). Never start an ISP session
when any erase or write operation of the UFM is in progress, as this may put the device in an unrecoverable
state. This restriction does not apply to the read operation of the UFM.
The MAX II and MAX V UFM can be programmed, erased, and verified through the Joint Test Action
Group (JTAG) port, or through connections to or from the logic array in accordance with IEEE Std. 1532-
2002. There are 13 interface signals (Figure 3–1) to and from the UFM block and logic array, which allow
the logic array to read or write to the UFM during device user mode. A reference design or user logic can
be used to interface the UFM to many standard interface protocols such as Serial Communication Interface
(SCI), Serial Peripheral Interface (SPI), Inter-Integrated Circuit (I2C), Microwire, or other proprietary
protocols.
Serial Peripheral Interface
Serial peripheral interface (SPI) is a four-pin serial communication subsystem included on the Motorola
6805 and 68HC11 series microcontrollers. SPI allows the microcontroller unit to communicate with peripheral
devices, and is capable of inter-processor communications in a multiple-master system.
The SPI bus consists of masters and slaves. The master device initiates and controls the data transfers, and
provides the clock signal for synchronization. The slave device responds to the data transfer request from
the master device. The master device in an SPI bus initiates a service request and the slave devices respond
to the service request. The UFM is configured as the slave device for the SPI bus.
There are only four pins in SPI: SI, SO, SCK, and nCS. Data transmitted to the SI port of the slave device is
sampled by the slave device at the positive SCK clock. Data transmits from the slave device through SO at
the negative SCK clock edge. When nCS is asserted, it means the current device is being selected by the
master device from the other end of the SPI bus for service. When nCS is not asserted, the SI and SCK ports
should be blocked from receiving signals from the master device, and SO should be in high impedance state
to avoid causing contention on the shared SPI bus. All instructions, addresses, and data are transferred with
the MSB first, and start with high-to-low nCS transition.
The nCS signal cannot be toggled simultaneously with the clock edge of SCK. During read/write mode, a
low-to-high transition of nCS requires a minimum of 420 ns of hold time before it can be asserted low again.
A high-to-low transition of nCS requires a minimum wait of 420 ns before the first SCK clock edge.
Parallel Interface
This interface allows for parallel communication between the UFM block and outside logic. Once the READ
request, WRITE request, or ERASE request is asserted (active low assertion), the outside logic or device
(such as a microcontroller) are free to continue their operation while the data in the UFM is retrieved,
written, or erased. During this time, the nBUSY signal is driven “low” to indicate that it is not available to
respond to any further request. After the operation is complete, the nBUSY signal is brought back to “high”
to indicate that it is now available to service a new request. If it was the Read request, the DATA_VALID is
driven “high” to indicate that the data at the DO port is the valid data from the last read address.
Altera User Flash Memory (ALTUFM) IP Core User Guide Altera Corporation
Send Feedback
UG-040105
Serial Peripheral Interface 24
2014.08.18