Altera Cyclone V E FPGA - Manual (Page 29)

Chapter 6: Board Test System 6–13
Configuring the FPGA Using the Quartus II Programmer
December 2014 Altera Corporation Cyclone V E FPGA Development Kit
User Guide
Serial Port Registers
The Serial port registers control shows the current values from the Si570 registers.
f For more information about the Si570 registers, refer to the Si570/Si571 data sheet
available on the Silicon Labs website (
www.silabs.com ).
fXTAL
The fXTAL control shows the calculated internal fixed-frequency crystal, based on the
serial port register values.
For more information about the f
XTAL
value and how it is calculated, refer to the
Si570/Si571 data sheet available on the Silicon Labs website ( www.silabs.com ).
Target Frequency
The Target frequency control allows you to specify the frequency of the clock. Legal
values are between 10 and 810 MHz with eight digits of precision to the right of the
decimal point. For example, 421.31259873 is possible within 100 parts per million
(ppm). The Target frequency control works in conjunction with the Set New
Frequency
control.
Clear
This control sets the frequency for the oscillator associated with the active tab back to
its default value. This can also be accomplished by power cycling the board.
Set New Frequency
The Set New Frequency control sets the programmable oscillator frequency for the
selected clock to the value in the Target frequency control for the Si570. Frequency
changes might take several milliseconds to take effect. You might see glitches on the
clock during this time. Altera recommends resetting the FPGA logic after changing
frequencies.
Configuring the FPGA Using the Quartus II Programmer
You can use the Quartus II Programmer to configure the FPGA with a specific .sof.
Before configuring the FPGA, ensure the following:
■ The Quartus II Programmer and the USB-Blaster II driver are installed on the
host computer.
■ The USB cable is connected to the FPGA development board.
■ Power to the board is on, and no other applications that use the JTAG chain are
running.
To configure the Cyclone V E FPGA, perform these steps:
1. Start the Quartus II Programmer.
2. Click Auto Detect to display the devices in the JTAG chain.
3. Click Add File and select the path to the desired .sof.
4. Turn on the Program/Configure option for the added file.