Altera Data Conversion HSMC - Manual (Page 25)

© November 2008 Altera Corporation Data Conversion HSMC Reference Manual
A. Pin-Out Information for the Cyclone III
(3C120) Development Board
Table A–1 provides the HSMC Port A interface pin-out information for the Cyclone III
EP3C120F780 development board.
Table A–1. HSMC Port A Interface Pin-Out Information (Part 1 of 4)
Data Conversion HSMC Schematic Development Board Schematic
Board
Reference
(J1) Description
Schematic
Signal Name
Schematic
Signal Name
I/O
Standard
Cyclone
III
Pin
Number
33 Management serial data SDA HSMA_SDA 2.5 V AC1
34 Management serial clock SCL HSMA_SCL 2.5 V AC3
41 Dedicated CMOS I/O bit 0 ADA_D13 HSMA_D0 2.5 V AB6
42 Dedicated CMOS I/O bit 1 ADB_D13 HSMA_D1 2.5 V AF2
43 Dedicated CMOS I/O bit 2 ADA_D12 HSMA_D2 2.5 V AE3
44 Dedicated CMOS I/O bit 3 ADB_D12 HSMA_D3 2.5 V AC5
47 LVDS TX or CMOS I/O bit 0 ADA_D11 HSMA_TX_D_P0 LVDS or
2.5 V
R7
48 LVDS RX or CMOS I/O bit 0 ADB_D11 HSMA_RX_D_P0 LVDS or
2.5 V
AB2
49 LVDS TX or CMOS I/O bit 0 ADA_D10 HSMA_TX_D_N0 LVDS or
2.5 V
R6
50 LVDS RX or CMOS I/O bit 0 ADB_D10 HSMA_RX_D_N0 LVDS or
2.5 V
AB1
53 LVDS TX bit 1p or CMOS I/O data 8 ADA_D9 HSMA_TX_D_P1 LVDS or
2.5 V
V4
54 LVDS RX bit 1p or CMOS I/O data 9 ADB_D9 HSMA_RX_D_P1 LVDS or
2.5 V
Y4
55 LVDS TX bit 1n or CMOS I/O data bit 10 ADA_D8 HSMA_TX_D_N1 LVDS or
2.5 V
V3
56 LVDS RX bit 1n or CMOS I/O data bit 11 ADB_D8 HSMA_RX_D_N1 LVDS or
2.5 V
Y3
59 LVDS TX bit 2p or CMOS I/O data bit 12 ADA_D7 HSMA_TX_D_P2 LVDS or
2.5 V
T4
60 LVDS RX bit 2p or CMOS I/O data bit 13 ADB_D7 HSMA_RX_D_P2 LVDS or
2.5 V
U3
61 LVDS TX bit 2n or CMOS I/O data bit 14 ADA_D6 HSMA_TX_D_N2 LVDS or
2.5 V
T3
62 LVDS RX bit 2n or CMOS I/O data bit 15 ADB_D6 HSMA_RX_D_N2 LVDS or
2.5 V
U4
65 LVDS TX bit 3p or CMOS I/O data bit 16 ADA_D5 HSMA_TX_D_P3 LVDS or
2.5 V
R3