Altera Data Conversion HSMC User Manual

Page 28

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A–4

Appendix A: Pin-Out Information for the Cyclone III (3C120)

Development Board

Data Conversion HSMC Reference Manual

© November 2008

Altera Corporation

126

LVDS RX 12p or CMOS I/O data bit 57

DB5

HSMA_RX_D_P12

LVDS or

2.5 V

J6

127

LVDS TX 12n or CMOS I/O data bit 58

DA4

HSMA_TX_D_N12

LVDS or

2.5 V

K7

128

LVDS RX 12n or CMOS I/O data bit 59

DB4

HSMA_RX_D_N12

LVDS or

2.5 V

J5

131

LVDS TX 13p or CMOS I/O data bit 60

DA3

HSMA_TX_D_P13

LVDS or

2.5 V

G2

132

LVDS RX 13p or CMOS I/O data bit 61

DB3

HSMA_RX_D_P13

LVDS or

2.5 V

H4

133

LVDS TX 13n or CMOS I/O data bit 62

DA2

HSMA_TX_D_N13

LVDS or

2.5 V

G1

134

LVDS RX 13n or CMOS I/O data bit 63

DB2

HSMA_RX_D_N13

LVDS or

2.5 V

H3

137

LVDS TX 14p or CMOS I/O data bit 64

DA1

HSMA_TX_D_P14

LVDS or

2.5 V

F5

138

LVDS TX 14p or CMOS I/O data bit 65

DB1

HSMA_RX_D_P14

LVDS or

2.5 V

G4

139

LVDS RX 14n or CMOS I/O data bit 66

DA0

HSMA_TX_D_N14

LVDS or

2.5 V

F4

140

LVDS RX 14n or CMOS I/O data bit 67

DB0

HSMA_RX_D_N14

LVDS or

2.5 V

G3

143

LVDS RX 15p or CMOS I/O data bit 68

AIC_DIN

HSMA_TX_D_P15

LVDS or

2.5 V

E2

144

LVDS TX 15p or CMOS I/O data bit 69

AIC_DOUT

HSMA_RX_D_P15

LVDS or

2.5 V

F2

145

LVDS RX 15n or CMOS I/O data bit 70

AIC_LRCIN

HSMA_TX_D_N15

LVDS or

2.5 V

E1

146

LVDS TX 15n or CMOS I/O data bit 71

AIC_LRCOUT

HSMA_RX_D_N15

LVDS or

2.5 V

F1

149

LVDS RX 16p or CMOS I/O data bit 72

AIC_BCLK

HSMA_TX_D_P16

LVDS or

2.5 V

D3

150

LVDS TX 16p or CMOS I/O data bit 73

AIC_XCLK

HSMA_RX_D_P16

LVDS or

2.5 V

E3

151

LVDS TX 16n or CMOS I/O data bit 74

AIC_SPI_CS

HSMA_TX_D_N16

LVDS or

2.5 V

C2

155

LVDS or CMOS clock out

FPGA_CLK_B_P

HSMA_CLK_OUT_P2

LVDS

D2

156

LVDS or CMOS clock in

ADA_DCO

HSMA_CLK_IN_P2

LVDS

J2

157

LVDS or CMOS clock out

FPGA_CLK_B_N

HSMA_CLK_OUT_N2

2.5 V

D1

158

LVDS or CMOS clock in

ADB_DCO

HSMA_CLK_IN_N2

2.5 V

J1

Table A–1. HSMC Port A Interface Pin-Out Information (Part 4 of 4)

Data Conversion HSMC Schematic

Development Board Schematic

Board

Reference

(J1)

Description

Schematic

Signal Name

Schematic

Signal Name

I/O

Standard

Cyclone

III

Pin

Number

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