Measurement Computing PCM-DAS16x/16 - Manual (Page 37)

CMRR @ 60Hz
PCM-DAS16D/16 -76dB
Input leakage current ±20nA
Input impedance 10Meg Ohms min
Absolute maximum input voltage ±15V
Noise Distribution (Rate = 1-100KHz, Average % +/- 2 bins, Average % +/- 1 bin,
Average # bins)
Bipolar (10V) 79% / 97% / 10 bins
Bipolar (5V) 84% / 97% / 12 bins
Bipolar (2.5V) 79% / 97% / 12 bins
Bipolar (1.25V) 57% / 68% / 14 bins
11.3 COUNTER
Counter type 82C54
Configuration 3 down counters, 16 bits each
Counter 0 - User counter 1
Source: Programmable external (Ctr 1 Clk) or 100kHz internal source
Gate:
Available at connector (Ctr 1 Gate)
Output: Available at connector (Ctr 1 Out)
Counter 1 - ADC Pacer Lower Divider
Source: Programmable, 1MHz or 10 MHz internal source
Gate:
Available at connector (Ctr 2 Gate), pulled to logic high
through 10k resistor
Output: Chained to Counter 2 Clock
Counter 2 - ADC Pacer Upper Divider
Source: Counter 1 Output
Gate:
Programmable, external (Ext Trig/Clk) or Not Connected
(pulled high through 10k resistor)
Output: Programmable as ADC Pacer clock, hardwired to user
connector (Ctr 3 Out)
Clock input frequency 10Mhz max
High pulse width (clock input) 30ns min
Low pulse width (clock input) 50ns min
Gate width high 50ns min
Gate width low 50ns min
Input low voltage 0.8V max
Input high voltage 2.0V min
Output low voltage 0.4V max
Output high voltage 3.0V min
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