Sundance SMT395Q - Manual (Page 4)

Version 1.0.7 Page 4 of 31 SMT395Q User Manual
IIOF interrupt......................................................................................................... 15
LED....................................................................................................................... 15
TTL ....................................................................................................................... 15
System Control ....................................................................................................... 16
Board Operating Parameters ................................................................................ 19
Code Composer Studio.......................................................................................... 22
3L Diamond Issues................................................................................................. 22
Operating Conditions............................................................................................. 23
Safety.................................................................................................................... 23
EMC...................................................................................................................... 23
General Requirements.......................................................................................... 23
Power Consumption.............................................................................................. 23
PCB description...................................................................................................... 24
Component Side ................................................................................................... 24
Solder Side ........................................................................................................... 25
Power Connector.................................................................................................... 26
Jumpers/Links ........................................................................................................ 26
JP3 – Prog Sel. ..................................................................................................... 26
JP1 – FPGA JTAG................................................................................................ 26
JP2- TTL I/O ......................................................................................................... 27
SHB pin-out........................................................................................................... 27
RSL pin-out ........................................................................................................... 27
Virtex Memory Map................................................................................................. 28
FPGA Pinout ........................................................................................................... 29
Bibliography............................................................................................................ 30
INDEX ...................................................................................................................... 31