Remote Processing RPC-220 - Manual (Page 26)

REAL TIME CLOCK SECTION 7
Page 7-1
INTRODUCTION
R E A L T IM E C L O C K S E C T IO N 7
An optional real time clock (RTC) incorporates an
industry standard DS1287 with several enhanced
features. Of note, these include a silicon serial number,
century register, power elapsed time counters, and
power cycle counter.
This optional RTC is battery backed and also backs up
RAM in U4. It can generate an interr upt or wake up the
CPU from low power mode at periodic time intervals or
preset time.
This section of the man ual addre sses many of the par ts
features and capabilities. However, not all are
discussed. Review the data sheet, 1689-93. PDF , for
more inform ation.
YEAR 2000
The RTC has a century counter which rolls over from
1999 to 2000. Run the demo program RTC-1. C and set
the date/time to late December 31, 1999. You can
watch the date roll over to year 2000.
ADDRESSING
The RTC' s base address is 0xa000. The part is accessed
when I/O contr ol bit P4.0 is low and any MO VX type
access between 0xa000 and 0xa0ff is performed. Clock
registers ar e accessed by adding 0xa0 00 to the address.
Review the application programs in the RTC
subdirectory for progr amming exam ples. RTC -1.C
accesses most all functions.
Note that the re ar e two re gister bank s in this chip. Both
b a nk s al lo w a cc e ss to ti m ek e ep in g , c on tr o l, a n d s o m e
RAM . Bank 0 has an addition al 64 bytes of R AM while
bank 1 has serial number, extended control, and other
timers. Bank control is through register A, bit 4. See
page 10 of the 1689-93.PDF file for register A
information.
The debug monitor is also useful for accessing the
various registers. C ommand M P is used to display and
modify a register. Command DP displays all registers
and RAM addresses. M onitor use is shown under
"SQUARE WAVE OUTPUT" below.
PROGRAMMING NOTES
The optional RTC oscillator is turned off and date, time,
and counters are reset to zero as shipped from the
factory.
The cr ystal used is 12. 5 pf. Bit 5 must be set in
extended control register 4B. This bit is set in
R T C - 1. C d e m on s tr a ti on p r og r a m .
LOW POWER MODES
The CP U can enter two kinds of low pow er mode s:
P o w er d o wn a nd id le . P o w er d o wn d r aw s on ly 4 m a
board current at 5 volts. Idle mode draws about 10 ma.
The PCON register determines the mode. Refer to CPU
manual, page 3-523 in 8XC552OV.PDF, for more
information.
The dem onstration p rogr am RT C-3. C dem onstrates b oth
modes. RTC operation is the same. The only real
difference is how PCO N register is set (program med),
interrupt handed, and jum pers configured.
Power Down
The only way to "wake-up" the CPU from a power
down mode is with a reset. A RTC interrupt, through
jumper W2, makes this happen.
When W2 is installed, make sure you do not have INT1
and the RTCIRQ lines jumpered together on J3 (pins 23
and 25). No damage will result, but you will never get
interr upts since the ca rd will alw ays rese t.
CPU r egister PCON, bit 1, controls power down mode.
Setting this bit high shuts off the CPU its crystal. The
demonstra tion program configures the RT C and causes a
reset in 5 seconds. When the RTC sends out its pulse,
the card stays in reset for about 350 ms.
Review RTC -3.C demonstration program . M ake the
few modifications as explained in the code for the
different power down mod es.
Developing in Power Down Mode
The only way to effectively run and test power down
mode is to put the program in EPROM and run it, since
the card re sets.
As an alternative, progr am PC ON for idle mode. You
can use INT1 to trigger an interrupt and run a reset
simulation (ie GOT O 0x8000 after the inte rrup t is
h a nd le d ). P o w e r le v el s i n i dl e m o d e a r e ab o ut 10 m a
instead of 4 but at least you can test reset recovery