FUJITSU F2MC-8L F202RA - Manual (Page 208)

192
CHAPTER 8 8/16-BIT CAPTURE TIMER/COUNTER
Figure 8.7-4 Counter Function Operation in 16-bit Mode
Note:
Confirm the validity of the values set in the counter operating in 16-bit mode.
88
H
34
H
0000
H
0001
H
0002
H
0003
H
1388
H
0000
H
0001
H
13
H
12
H
88
H
34
H
13 H 12 H
External clock
Counter clear
TSTR0 bits
Counter value
Comparator data latch 1
(lower 8-bit comparison value)
Comparator data latch 2
(higher 8-bit comparison value)
Load Load
TDR0 *
(lower 8-bit setting value)
TDR1 *
(higher 8-bit setting value)
Data setting (1234
H
)
TIF0
Clear by program
* : A value can be set according to any timing. When the counter is started or when a match is detected,
the data register setting value is loaded to the comparator data latch. In this case, the counter is cleared.