FUJITSU F2MC-8L F202RA - Manual (Page 51)

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CHAPTER 3 CPU
IRQB (Flash interface) FFE4
H
FFE5
H
LB1, LB0
High
Low
IRQC (8-bit serial I/O) FFE2
H
FFE3
H
LC1, LC0
IRQD (Unused) FFE0
H
FFE1
H
LD1, LD0
IRQE (Unused) FFDE
H
FFDF
H
LE1, LE0
IRQF (Unused) FFDC
H
FFDD
H
LF1, LF0
Table 3.4-1 Interrupt Requests and Interrupt Vectors (2/2)
Interrupt request
Address in the
vector table
Names of bits in
the interrupt
level setting
registers Priority at
identical level (at
simultaneous
occurrence)
Upper
digits
Lower
digits