Synchronous dram timing (continued) – Motorola TMS320C6711D User Manual
Page 81
Advertising
TMS320C6711D
FLOATINGĆPOINT DIGITAL SIGNAL PROCESSOR
SPRS292A − OCTOBER 2005 − REVISED NOVEMBER 2005
81
POST OFFICE BOX 1443
•
HOUSTON, TEXAS 77251−1443
SYNCHRONOUS DRAM TIMING (CONTINUED)
ECLKOUT
CEx
BE[3:0]
EA[21:2]
ED[31:0]
AOE/SDRAS/SSOE†
ARE/SDCAS/SSADS†
AWE/SDWE/SSWE†
MRS value
11
8
12
5
1
MRS
11
8
12
4
1
† ARE/SDCAS/SSADS, AWE/SDWE/SSWE, and AOE/SDRAS/SSOE operate as SDCAS, SDWE, and SDRAS, respectively, during SDRAM
accesses.
Figure 37. SDRAM MRS Command
Advertising