SOYO SY-7VCA - Manual (Page 16)

Motherboard Description SY-7VCA
12
1-9 CHIPSET
Ø VT82C694X
The VIA 694X is a high performance, cost-effective and energy efficient
chip set for the implementation of AGP/PCI/ISA desktop personal
computer systems from 66MHz, 100MHz and 133MHz based on 64-bit
Socket 370 super-scalar processors.
The Via 694X chip set consists of the VT82C694A system controller (510
pin BGA) and the VT82C686A PCI to ISA bridge (324 pin BGA). The
system controller provides superior performance between the CPU,
DRAM, AGP bus, and PCI bus with pipelined, burst, and concurrent
operation.
The VT82C694X supports eight banks of DRAMs up to 1.5GB. The
DRAM controller supports standard Fast Page Mode (FPM) DRAM,
EDO-DRAM, Synchronous DRAM (SDRAM) and Virtual Channel
SDRAM (VC SDRAM), in a flexible mix / match manner. The
Synchronous DRAM interface allows zero wait state bursting between the
DRAM and the data buffers at 66/100/133 MHz. The eight banks of
DRAM can be composed of an arbitrary mixture of
1M/2M/4M/8M/16M/32MxN DRAMs. The DRAM controller also
supports optional ECC (single-bit error correction and multi-bit detection)
or EC (error checking) capability separately selectable on a bank-by-bank
basis. The DRAM controller can run at either the host CPU bus frequency
(66/100/133 MHz) or at the AGP bus frequency (66 MHz) with built-in
PLL timing control.
The VT82C694X system controller also supports full AGP v2.0 capability
for maximum bus utilization including 4x mode transfers, SBA (Side Band
Addressing), Flush/Fence commands, and pipelined grants. An eight level
request queue plus a four level post-write request queue with thirty-two
and sixteen quad words of read and write data FIFO’s respectively are
included for deep pipelined and split AGP transactions. A single-level
GART TLB with 16 full associative entries and flexible CPU/AGP/PCI
remapping control is also provided for operation under protected mode