National Instruments PXI NI 8171 Series User Manual
Page 14
Chapter 1
Introduction
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The NI 8171 series consists of the following logic blocks on the CPU
module and the I/O (daughter card) module. The CPU module has the
following logic blocks:
•
Socket 370 CPU is the socket definition for the Intel Pentium III
processor families.
•
The SO-DIMM block consists of a 64-bit SDRAM socket that can hold
up to 256 MB.
•
The Chip Set GMCH connects to the CPU, SDRAM, and video.
•
The SMB to PXI triggers provide a routable connection of the PXI
triggers to/from the SMB on the front panel.
•
The Watchdog Timer block consists of a watchdog timer that can reset
the controller or generate a trigger.
•
The Chip Set ICH2 connects to the PCI bus USB, IDE, LPC, and
Ethernet ports.
•
The USB connector connects the chip set to the Universal Serial Bus
interface.
•
The PXI connector connects the NI 8171 series to the
PXI/CompactPCI backplane.
•
The Keyboard/Mouse block contains the PS/2 keyboard and mouse
interface.
•
The Super I/O block represents the other peripherals supplied by the
NI 8171 series. The NI 8171 series has up to two serial ports, an
ECP/EPP parallel port, and a 1.44 MB, 3.5 in. floppy drive.
•
The IDE block is dedicated PCI-IDE circuitry providing fast ATA-100
transfers to the internal hard drive. The IDE feature is built into the
chip set.
•
The 10/100 Enet connects to either 10 Mbit or 100 Mbit Ethernet
interfaces.
•
Internal 1.44 MB floppy drive (NI 8176 and NI 8175 only)
•
2.5 in. hard drive—10 GB or larger
•
TFT LCD interface for PXI-1020 and PXI-1025 chassis
•
USB-to-PS/2 interface for PXI-1020 and PXI-1025 chassis