Preface, Read this first – Texas Instruments DM648 DSP User Manual

Page 6

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Preface

SPRUEK5A – October 2007

Read This First

About This Manual

This document describes the DDR2 memory controller in the TMS320DM647/DM648 Digital Signal
Processor (DSP).

Notational Conventions

This document uses the following conventions.

Hexadecimal numbers are shown with the suffix h. For example, the following number is 40
hexadecimal (decimal 64): 40h.

Registers in this document are shown in figures and described in tables.

Each register figure shows a rectangle divided into fields that represent the fields of the register.
Each field is labeled with its bit name, its beginning and ending bit numbers above, and its
read/write properties below. A legend explains the notation used for the properties.

Reserved bits in a register figure designate a bit that is used for future device expansion.

Note:

Acronyms 3PSW, CPSW, CPSW_3G, and 3pGSw are interchangeable and all refer to the 3
port gigabit switch.

Related Documentation From Texas Instruments

The following documents describe the TMS320DM647/DM648 Digital Signal Processor (DSP). Copies of
these documents are available on the Internet at

www.ti.com

. Tip: Enter the literature number in the

search box provided at

www.ti.com

.

SPRS372

TMS320DM647/DM648 Digital Media Processor Data Manual describes the signals,

specifications and electrical characteristics of the device.

SPRU732

TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide describes the CPU

architecture, pipeline, instruction set, and interrupts for the TMS320C64x and TMS320C64x+ digital
signal processors (DSPs) of the TMS320C6000 DSP family. The C64x/C64x+ DSP generation
comprises fixed-point devices in the C6000 DSP platform. The C64x+ DSP is an enhancement of
the C64x DSP with added functionality and an expanded instruction set.

SPRUEK5

TMS320DM647/DM648 DSP DDR2 Memory Controller User's Guide describes the DDR2

memory controller in the TMS320DM647/DM648 Digital Signal Processor (DSP). The DDR2/mDDR
memory controller is used to interface with JESD79D-2A standard compliant DDR2 SDRAM
devices and standard Mobile DDR SDRAM devices.

SPRUEK6

TMS320DM647/DM648 DSP External Memory Interface (EMIF) User's Guide describes

the operation of the asynchronous external memory interface (EMIF) in the TMS320DM647/DM648
Digital Signal Processor (DSP). The EMIF supports a glueless interface to a variety of external
devices.

SPRUEK7

TMS320DM647/DM648 DSP General-Purpose Input/Output (GPIO) User's Guide

describes the general-purpose input/output (GPIO) peripheral in the TMS320DM647/DM648 Digital
Signal Processor (DSP). The GPIO peripheral provides dedicated general-purpose pins that can be
configured as either inputs or outputs. When configured as an input, you can detect the state of the
input by reading the state of an internal register. When configured as an output, you can write to an
internal register to control the state driven on the output pin.

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Preface

SPRUEK5A – October 2007

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