Texas Instruments TMS320C2XX - Manual (Page 103)

Program-Address Generation
5-4
The ’C2xx can load the PC in a number of ways, to accommodate sequential
and nonsequential program flow. Table 5–2 shows what is loaded to the PC
according to the code operation performed.
Table 5–2. Address Loading to the Program Counter
ББББББББ
ББББББББ
Code Operation
ББББББББББББББББ
ББББББББББББББББ
Address Loaded to the PC
ББББББББ
Б ББББББ Б
ББББББББ
Sequential execution
ББББББББББББББББ
Б ББББББББББББББ Б
ББББББББББББББББ
The PC is loaded with PC + 1 if the current instruction has
one word or PC + 2 if the current instruction has two words.
ББББББББ
Б ББББББ Б
ББББББББ
Branch
ББББББББББББББББ
Б ББББББББББББББ Б
ББББББББББББББББ
The PC is loaded with the long immediate value directly fol-
lowing the branch instruction.
ББББББББ
Б ББББББ Б
Б ББББББ Б
Б ББББББ Б
ББББББББ
Subroutine call and
return
ББББББББББББББББ
Б ББББББББББББББ Б
Б ББББББББББББББ Б
Б ББББББББББББББ Б
ББББББББББББББББ
For a call, the address of the next instruction is pushed from
the PC onto the stack, and then the PC is loaded with the
long immediate value directly following the call instruction.
A return instruction pops the return address back into the PC
to return to the calling sequence of code.
ББББББББ
Б ББББББ Б
Б ББББББ Б
ББББББББ
Software or hardware
interrupt
ББББББББББББББББ
Б ББББББББББББББ Б
Б ББББББББББББББ Б
ББББББББББББББББ
The PC is loaded with the address of the appropriate inter-
rupt vector location. At this location is a branch instruction
that loads the PC with the address of the corresponding in-
terrupt service routine.
ББББББББ
Б ББББББ Б
Б ББББББ Б
Б ББББББ Б
ББББББББ
Computed GOTO ББББББББББББББББ
Б ББББББББББББББ Б
Б ББББББББББББББ Б
Б ББББББББББББББ Б
ББББББББББББББББ
The content of the lower 16 bits of the accumulator is loaded
into the PC. Computed GOTO operations can be performed
using the BACC (branch to address in accumulator) or
CALA (call subroutine at location specified by the accumula-
tor) instructions.
5.1.2 Stack
The ’C2xx has a 16-bit-wide, 8-level-deep hardware stack. The program-ad-
dress generation logic uses the stack for storing return addresses when a sub-
routine call or interrupt occurs. When an instruction forces the CPU into a sub-
routine or an interrupt forces the CPU into an interrupt service routine, the re-
turn address is loaded to the top of the stack automatically; this event does not
require additional cycles. When the subroutine or interrupt service routine is
complete, a return instruction transfers the return address from the top of the
stack to the program counter.
When the eight levels are not used for return addresses, the stack may be used
for saving context data during a subroutine or interrupt service routine, or for
other storage purposes.
You can access the stack with two sets of instructions:
- PUSH and POP. The PUSH instruction copies the lower half of the accu-
mulator to the top of the stack. The POP instruction copies the value on
the top of the stack to the lower half of the accumulator.