Texas Instruments TMS320C2XX - Manual (Page 382)

Controlling and Resetting the Port
9-14
1) Create interrupt service routines for XINTs and RINTs and include a
branch to each service routine at the appropriate interrupt vector address:
- The RINT vector is fetched from address 0008h.
- The XINT vector is fetched from address 000Ah.
2) Select when you want interrupts to occur and set the FR0, FR1, FT0, and
FT1 bits accordingly. You can set the FIFO buffers to generate interrupts
when they are empty, when they have 1 or 2 words, when they have 3 or
4 words, or when they are full. Table 9–4 and Table 9–3 show what values
to set in the FR0, FR1, FT0, and FT1 bits for each condition.
3) Enable the interrupts by unmasking them in the interrupt mask register
(IMR).
For more information about interrupts, see Section 5.6, Interrupts, p. 5-15.
Note:
To avoid a double interrupt from the SSP, clear the IFR bit (XINT or RINT)
in the corresponding interrupt service routine, just before returning from the
routine.