Texas Instruments TMS320C2XX - Manual (Page 395)

Troubleshooting
9-27 Synchronous Serial Port
9.7 Troubleshooting
The synchronous serial port uses three bits for troubleshooting and testing. In
addition to using these three bits, you must be able to identify special error
conditions that may occur in actual transfers. Error conditions result from an
unprogrammed event occurring to the serial port. These conditions are opera-
tional errors such as overflow, underflow, or a frame sync pulse during a data
transfer.
This section describes how the serial port handles these errors and the state
it acquires during these error conditions. The types of errors differ slightly in
burst and continuous modes.
9.7.1 Test Bits
Three bits in the SSPCR help you test the synchronous serial port. The digital
loopback mode bit (DLB) can be used to internally connect the receive data
and frame sync signals to the transmit data and frame sync signals on the
same device. The FREE and SOFT bits allow emulation modes that stop the
port either immediately or after the transmission of the current word.
Figure 9–10 shows the bits that are used for troubleshooting. The list items fol-
lowing the figure describe the functions of these bits.
Figure 9–10. Test Bits in the SSPCR
ББ
ББ
БББ
БББ
15 БББ
БББ
14 БББ
БББ
ББ
ББ
БББ
БББ
ББ
ББ
БББ
БББ
БББ
БББ
ББ
ББ
БББ
БББ
БББ
БББ
БББ
БББ
БББ
БББ
БББ
БББ
БББ
БББ
БББ
БББ
0 Б
Б ББ
ББ
БББ
БББ
FREE БББ
БББ
SOFT ЙЙЙЙЙЙЙЙЙЙЙЙЙЙЙЙЙЙ
ЙЙЙЙЙЙЙЙЙЙЙЙЙЙЙЙЙЙ
ЙЙЙЙЙЙЙ
ЙЙЙЙЙЙЙ
БББ
БББ
DLB Б
Б ББ
ББ
БББ
БББ
БББ
БББ
БББ
БББ
ББ
ББ
БББ
БББ
ББ
ББ
БББ
БББ
БББ
БББ
ББ
ББ
БББ
БББ
БББ
БББ
БББ
БББ
БББ
БББ
БББ
БББ
БББ
БББ
БББ
БББ
Б
Б - FREE and SOFT are special emulation bits that allow you to determine
the state of the serial port clock when a breakpoint is encountered in the
high-level language debugger. If the FREE bit is set to 1, then, upon a soft-
ware breakpoint, the clock continues to run (that is, free runs) and data is
shifted out. In this case, SOFT is a
don’t care. But if FREE is 0, then SOFT
takes effect. If SOFT = 0, then the clock immediately stops, thus aborting
any transmission. If the SOFT bit is 1, the particular transmission contin-
ues until completion of the word, and then the clock halts. Table 9–6 sum-
marizes the available run and emulation modes.