Cirrus Logic CS3318 - Manual (Page 26)

26 DS693F1
CS3318
Once this configuration process is complete, every device may be independently controlled with a standard
SPI communication cycle using the device’s newly assigned Individual device addresses.
5.8.2.2 I²C Mode Control Configuration
Up to 128 CS3318’s may be connected to a common I²C serial control bus. This shared serial bus is used
to assign a unique device address to each device on the bus such that they may be independently ad-
dressed. To implement this method of device address configuration, the devices must be connected as
shown in
Figure 11 .
Note that the serial control signals SCL and SDA are connected in parallel to each CS3318. The active low
reset output of the system controller is connected to the RESET input of the first CS3318 in the chain. The
ENOut of the first device is connected to the RESET input of the second CS3318 whose ENOut signal is
connected to the third CS3318. This pattern of connecting the ENOut of device N to the RESET input of
device N+1 may be repeated for up to 128 devices per common I²C bus. If more than 128 devices are re-
quired in a system, separate SDA or SCL signals may be used to create additional chains of up to 128 de-
vices.
As each device is placed into reset (RESET is low), its ENOut signal is driven low. The ENOut signal will
continue to be driven low until the device is taken out of reset (RESET is high) and the Enable bit (see
“En-
able Next Device (Bit 0)” on page 41 ) is set, at which time the ENOut signal will be driven high.
To configure a unique Individual device address for each device on the shared serial bus, the first device
must be reset (a low to high transition on its RESET pin), the Individual device address register must be
written (using the CS3318’s default device address) with a unique device address, and the Enable bit must
be set to take the next device in the serial control chain out of reset. This process may be repeated until all
devices in the serial control chain have been assigned a new Individual device address.
Figure 10 dia-
grams this configuration process.
Notice that Figure 10 shows the setting of the Individual address and the setting of the Enable bit as two
discrete steps. While this demonstrates one approach to device configuration, it should be noted that two
steps are not necessary to complete the action of setting the Individual address and enabling the next de-
vice. This may be done simultaneously with one register write (containing the new Individual address and
the Enable bit set) to the Individual address register.
Once the configuration process is complete, every device may be independently controlled with a standard
I²C communication cycle using the device’s newly assigned Individual device addresses.
μC
SDA
SCL
Device 1
SCL SDA
RESET ENout Device 2
SCL SDA
RESET ENout Device 3
SCL SDA
RESET ENout RST
Figure 11. I²C Serial Control Connections