Cirrus Logic CS3318 - Manual (Page 41)

DS693F1 41
CS3318
7.20 Individual Chip Address 1Bh
7.20.1 Individual Chip Address (Bits 7:1)
SPI Mode Default = 1000000b
I²C Mode Default = See
Table 4 on page 27
Function:
These bits set the individual chip address, and may be modified at any time. See “System Serial Con-
trol Configuration” on page 23 and “I²C/SPI Serial Control Formats” on page 27 for more information.
7.20.2 Enable Next Device (Bit 0)
Default = 0
Function:
When set, the CS3318’s enable output pin (ENOut) will be driven high. When cleared, the CS3318’s
enable output pin (ENOut) will be driven low.
7.21 Chip ID - Address 1Ch
This is a Read-Only register.
7.21.1 Chip ID (Bits 7:4)
Default = 0110b
Function:
Chip ID code for the CS3318. Permanently set to 0110.
7.21.2 Chip Revision (Bits 3:0)
Default = xxxxb
Function:
Chip revision code for the CS3318. Encoded as shown in Table 10 .
7 6 5 4 3 2 1 0
Ind_Addr6 Ind_Addr5 Ind_Addr4 Ind_Addr3 Ind_Addr2 Ind_Addr1 Ind_Addr0 Enable
7 6 5 4 3 2 1 0
ID3 ID2 ID1 ID0 Rev3 Rev2 Rev1 Rev0
Chip Revision Register Code
A0, B0 0000b
Table 10. Chip Revision Register Codes