Cirrus Logic CS3318 - Manual (Page 30)

30 DS693F1
CS3318
10h Master 1 Mask M1_Ch8M M1_Ch7M M1_Ch6M M1_Ch5M M1_Ch4M M1_Ch3M M1_Ch2M M1_Ch1M
page 36 1 1 1 1 1 1 1 1
11h Master 1 Vol-
ume
M1_Vol7 M1_Vol6 M1_Vol5 M1_Vol4 M1_Vol3 M1_Vol2 M1_Vol1 M1_Vol0
page 36 1 1 0 1 0 0 1 0
12h Master 1 Con-
trol
Reserved Reserved Reserved Reserved Reserved Reserved M1_Mute M1_Qtr
page 37 0 0 0 0 0 0 0 0
13h Master 2 Mask M2_Ch8M M2_Ch7M M2_Ch6M M2_Ch5M M2_Ch4M M2_Ch3M M2_Ch2M M2_Ch1M
page 37 1 1 1 1 1 1 1 1
14h Master 2 Vol-
ume
M2_Vol7 M2_Vol6 M2_Vol5 M2_Vol4 M2_Vol3 M2_Vol2 M2_Vol1 M2_Vol0
page 37 1 1 0 1 0 0 1 0
15h Master 2 Con-
trol
Reserved Reserved Reserved Reserved Reserved Reserved M2_Mute M2_Qtr
page 38 0 0 0 0 0 0 0 0
16h Master 3 Mask M3_Ch8M M3_Ch7M M3_Ch6M M3_Ch5M M3_Ch4M M3_Ch3M M3_Ch2M M3_Ch1M
page 38 1 1 1 1 1 1 1 1
17h Master 3 Vol-
ume
M3_Vol7 M3_Vol6 M3_Vol5 M3_Vol4 M3_Vol3 M3_Vol2 M3_Vol1 M3_Vol0
page 38 1 1 0 1 0 0 1 0
18h Master 3 Con-
trol
Reserved Reserved Reserved Reserved Reserved Reserved M3_Mute M3_Qtr
page 39 0 0 0 0 0 0 0 0
19h Group 2 Chip
Addr
G2_Addr6 G2_Addr5 G2_Addr4 G2_Addr3 G2_Addr2 G2_Addr1 G2_Addr0 EnG2Addr
page 40 1 0 0 0 0 0 X 0
1Ah Group 1 Chip
Addr
G1_Addr6 G1_Addr5 G1_Addr4 G1_Addr3 G1_Addr2 G1_Addr1 G1_Addr0 EnG1Addr
page 40 1 0 0 0 0 0 X 0
1Bh Individual Chip
Addr
Ind_Addr6 Ind_Addr5 Ind_Addr4 Ind_Addr3 Ind_Addr2 Ind_Addr1 Ind_Addr0 Enable
page 41 1 0 0 0 0 0 X 0
1Ch Chip ID ID3 ID2 ID1 ID0 Rev3 Rev2 Rev1 Rev0
page 41 0 1 1 0 X X X X
Addr Function 7 6 5 4 3 2 1 0