Cirrus Logic CS4202 - Manual (Page 32)

CS4202
32 DS549PP2
4.14 Audio Sample Rate Control Registers (Index 2Ch - 32h)
SR[15:0] Sample Rate Select. The Audio Sample Rate Control Registers (Index 2Ch - 32h) control
playback and capture sample rates. The PCM Front DAC Rate Register (Index 2Ch) controls
the Front Left and Front Right DAC sample rates. The PCM L/R ADC Rate Register
(Index 32h) controls the Left and Right ADC sample rates. There are seven sample rates di-
rectly supported by this register, shown in Table 10. Any value written to this register not con-
tained in Table 10 is not directly supported and will be decoded according to the ranges
indicated in the table. The range boundaries have been chosen so that only bits SR[15:12] of
each register will have to be considered. All register read transactions will reflect the actual
value stored (column 2 in Table 10) and not the one attempted to be written.
Default BB80h. This value corresponds to 48 kHz sample rate.
Writes to the PCM Front DAC Rate Register (Index 2Ch) and the PCM L/R ADC Rate Register (Index 32h) are only
available in Variable Rate PCM Audio mode when the VRA bit in the Extended Audio Status/Control Register
(Index 2Ah) is ‘set’. If VRA = 0, writes to the register are ignored and the register will always read BB80h.
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
SR15 SR14 SR13 SR12 SR11 SR10 SR9 SR8 SR7 SR6 SR5 SR4 SR3 SR2 SR1 SR0
Sample Rate
(Hz)
SR[15:0], register
content (hex value)
SR[15:0], decode
range (hex value)
SR[15:12], decode
range (bin value)
8,000 1F40 0000 - 1FFF 0000 - 0001
11,025 2B11 2000 - 2FFF 0010 - 0010
16,000 3E80 3000 - 3FFF 0011 - 0011
22,050 5622 4000 - 5FFF 0100 - 0101
32,000 7D00 6000 - 7FFF 0110 - 0111
44,100 AC44 8000 - AFFF 1000 - 1010
48,000 BB80 B000 - FFFF 1011 - 1111
Table 10. Directly Supported SRC Sample Rates for the CS4202