1 revision number bits (bits 7:0), Table 1. revision number, Cdb4270 – Cirrus Logic CDB4270 User Manual
Page 19
DS686DB3
19
CDB4270
5.2
FPGA CODE REVISION ID - ADDRESS 00H
5.2.1
Revision Number Bits (Bits 7:0)
Function:
Identifies FPGA code revision number. REV.7 - REV.4 indicate revision whole number, and REV.3 -
REV.0 indicate revision decimal number. These register bits are Read-Only. See
.
7
6
5
4
3
2
1
0
REV.7
REV.6
REV.5
REV.4
REV.3
REV.2
REV.1
REV.0
REV.7 REV.6 REV.5 REV.4 REV.3 REV.2 REV.1 REV.0
Revision Number
0
0
0
0
0
0
0
0
Not Used
0
0
0
1
0
0
0
1
Revision 1.1
0
0
0
1
0
0
1
0
Revision 1.2
0
0
0
1
0
0
1
1
Revision 1.3
0
0
0
1
0
1
0
0
Revision 1.4
0
0
0
1
0
1
0
1
Revision 1.5
0
0
0
1.
0
1
1
0
Revision 1.6
0
0
0
1
0
1
1
1
Revision 1.7
0
0
0
...
...
...
...
...
...
0
0
0
1
1
1
1
1
Revision 1.15
...
...
...
...
...
...
...
...
...
1
1
1
1
1
0
0
1
Revision 15.9
1
1
1
1
1
0
1
0
Revision 15.10
1
1
1
1
1
0
1
1
Revision 15.11
1
1
1
1
1
1
0
0
Revision 15.12
1
1
1
1
1
1
0
1
Revision 15.13
1
1
1
1
1
1
1
0
Revision 15.14
1
1
1
1
1
1
1
1
Revision 15.15
Table 1. Revision Number