Cirrus Logic CDB4270 - Manual (Page 23)

DS686DB3 23
CDB4270
5.5 CS8416 RX CONTROL - ADDRESS 03H
5.5.1 CS8416 RMCLK Divider Control (Bit 6)
Default = 0
Function:
This bit selects the CS8416 RMCLK divider ratio. Table 10 .
5.5.2 CS8416 Master/Slave Select (Bit 4)
Default = 0
Function:
This bit selects CS8416 Master Mode (SCLK, LRCK are outputs) or Slave Mode (SCLK, LRCK are in-
puts). See
Table 11
5.5.3 CS8416 SDOUT Format Select (Bit 3)
Default = 0
Function:
This bit selects the CS8416 SDOUT format. See. Table 12
7 6 5 4 3 2 1 0
Reserved RXCLK Reserved RX_M/S RX_FMT Reserved Reserved Reserved
RXCLK CS8416 RMCLK Frequency
0 256 x Fs
1 128 x Fs
Table 10. CS8416 RMCLK Frequency
RX_M/S CS8416 Master/Slave
0 CS8416 Slave Mode
1 CS8416 Master Mode
Table 11. CS8416 Master/Slave
RX_FMT CS8416 SDOUT Format
0 24-bit Left-Justified
1 24-bit I²S
Table 12. CS8416 SDOUT Format