Digital interface characteristics, Internal power-on reset threshold voltages, Figure 4. power-on reset threshold sequence – Cirrus Logic CS4354 User Manual

Page 10: Table 1. power-on reset threshold voltages, Cs4354 digital interface characteristics

Advertising
background image

10

DS895F2

CS4354

DIGITAL INTERFACE CHARACTERISTICS

Test conditions (unless otherwise specified): GND = 0 V; all voltages with respect to ground.

INTERNAL POWER-ON RESET THRESHOLD VOLTAGES

Test conditions (unless otherwise specified): GND = 0 V; all voltages with respect to ground.

Table 1. Power-On Reset Threshold Voltages

Figure 4. Power-On Reset Threshold Sequence

Parameters

Symbol Min Typ

Max

Units

High-level input voltage

1.8 V

VL  5.0 V

V

IH

0.7xVL

-

-

V

Low-level input voltage

1.8 V

VL  5.0 V

V

IL

-

-

0.3xVL

V

Input leakage current

I

in

-

-

±10

A

Input capacitance

-

8

-

pF

Parameters

Symbol

Min

Typ

Max

Units

Internal reset asserted at power-on

V

on1

-

0.2

-

V

Internal reset released at power-on

V

on2

-

3.6

-

V

Internal reset asserted at power-off

V

off

-

3.1

-

V

VA

V

on2

V

on1

V

off

GND

HI

LO

No Power

reset

undefined

reset

active

DAC

Ready

reset

active

reset

(internal)

Advertising