Cirrus Logic CS4354 - Manual (Page 17)

DS895F2 17
CS4354
U S E R : A pply P ow er
U S E R : A pply M C LK
M C LK /LR C K R atio D etection
U S E R : A pply LR C K
P ow er-O n R eset S tate
P ow er-D ow n S tate
Initialization S tate
P ow er-U p S tate
V alid M C LK /LR C K R atio
O utputs M uted
U S E R : C hange M C LK /LR C K ratio
U S E R :
R em ove M C LK
U S E R : A pplied S C LK
S C LK m ode = internal S C LK m ode = external
N orm al O peration
D e-em phasis
Is S electable
A nalog O utput
is G enerated
N orm al O peration
D e-em phasis
Is D isabled
U S E R : N o S C LK
M ute S tate
U S E R : C hange M C LK /LR C K ratio V alid M C LK/LR C K R atio
Figure 9. Initialization and Power-Down Sequence Diagram